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城市轨道交通运能瓶颈识别方法研究
引用本文:寇春歌,何世伟,何必胜.城市轨道交通运能瓶颈识别方法研究[J].交通信息与安全,2014,0(2):120-126.
作者姓名:寇春歌  何世伟  何必胜
作者单位:北京交通大学交通运输学院 北京 100044
基金项目:国家重点基础研究发展计划资助课题(批准号:2012CB725403)、国家科技支撑计划课题(批准号:2011BAG01802)资助
摘    要:城市轨道交通庞大的客流量导致了运能紧张及能力利用不合理的现象,严重影响了系统的整体运行效率。针对运能瓶颈问题进行分析,给出了车站瓶颈静态识别模型;结合能力利用公式和AnyLogic仿真软件,对车站的动态瓶颈进行了研究;对于区间线路瓶颈,提出了基于客流的识别方法;进一步分析了车站内部瓶颈以及车站、线路间瓶颈的动态传播变化规律。最后进行了实例应用,结果表明,复兴门站的车站瓶颈为站台层的换乘楼梯口处,2号线各区间的能力利用率相差不大,线路瓶颈最大值出现在建国门至朝阳门这一区间。该方法考虑了车站和线路不同位置的特性,并提出了相应的瓶颈识别思路,具有良好的实用价值。 

关 键 词:城市轨道交通    运能瓶颈    车站瓶颈    区间线路瓶颈    AnyLogic仿真

Transport Capacity Bottlenecks Identification of Urban Rail Transit
KOU Chunge,HE Shiwei,HE Bisheng.Transport Capacity Bottlenecks Identification of Urban Rail Transit[J].Journal of Transport Information and Safety,2014,0(2):120-126.
Authors:KOU Chunge  HE Shiwei  HE Bisheng
Affiliation:(School of Traffic and Transportation, Beijing Jiaotong University, Beijing 100044, China)
Abstract:The huge passenger flow makes transport capacity bottleneck problems becoming increasingly prominent , and has a bad impact on the system operating efficiency .In order to better analyze the problem ,this paper puts forward a recognition model on station static bottleneck ,and studies on station dynamic bottleneck by making use of capability utili-zation formulas as well as AnyLogic simulation software .Then this paper establishes a kind of line bottleneck analysis method based on passenger flow .Furthermore ,this paper also analyzes the dynamic transmission rules of bottlenecks . Finally ,the case study results show that the station bottleneck of FUXINGM EN Station emerges in the transfer stairs , while the Line 2 interval capacity utilization is balanced ,and its line bottleneck is generated between JIANGUOMEN Sta-tion and CHAOYANGMEN Station .Considering the characteristics of station and line ,this method puts forward corre-sponding bottleneck identification thoughts ,and it proves to be of practical value .
Keywords:urban rail transit  transportation capacity bottlenecks  station bottlenecks  interval line bottlenecks  AnyLogic simulation
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