| 基于FPGA的Rijndael算法实现的研究 |
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| 引用本文： | 吴鹏,李开成.基于FPGA的Rijndael算法实现的研究[J].铁路计算机应用,2007,16(3):46-48. |
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| 作者姓名： | 吴鹏 李开成 |
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| 作者单位： | 北京交通大学,电子信息工程学院,北京,100044 |
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| 摘 要： | 在研究分析高级加密标准(AES Rijndael)算法原理的基础上设计算法各部分实现的具体方法;采用超高速集成电路硬件描述语言(VHDL)完整地实现该算法,并在Quartus Ⅱ 5.1仿真环境中进行仿真,仿真结果表明,基于现场可编程门阵列(FPGA)实现的Rijndael算法能满足基于通信的列车控制(CBTC)系统对信息安全性和实时性的要求.
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| 关 键 词： | 高级加密标准 Rijndael算法 现场可编程门阵列 超高速集成电路硬件描述语言 基于通信的列车控制 |
| 文章编号： | 1005-8451(2007)03-0046-03 |
| 收稿时间： | 2007-03-15 |
| 修稿时间： | 2006-07-29 |
Research on implementation of Rijndael Algorithm based on FPGA |
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| WU Peng,LI Kai-cheng.Research on implementation of Rijndael Algorithm based on FPGA[J].Railway Computer Application,2007,16(3):46-48. |
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| Authors: | WU Peng LI Kai-cheng |
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| Institution: | School of Electronics and Information Engineering, Beijing Jiaotong University, Beijing 100044, China |
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| Abstract: | Based on the investigation to the principle and specification of Rijndael Cipher Algorithm, it was presented a complete VHDL implementation of Rijndael. This design was simulated in Quartus II 5.1 environment. The simulated results showed that the implementation of Rijndael based on FPGA can satisfy the security and real time requirements which were both what the CBTC request. |
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| Keywords: | AES Rijndael Algorithm FPGA VHDL CBTC |
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