| 基于SystemC语言的伪随机序列发生器设计 |
| |
| 引用本文： | 裴佩,卢立丹.基于SystemC语言的伪随机序列发生器设计[J].舰船电子工程,2010,30(2):138-140. |
| |
| 作者姓名： | 裴佩 卢立丹 |
| |
| 作者单位： | 中国船舶重工集团公司第722研究所,武汉,430079 |
| |
| 摘 要： | 提出了一种基于SystemC的伪随机序列发生器硬件设计，并使用Agility Compiler软件完成了仿真。仿真结果表明，该设计方法效率高，且灵活性强。
|
| 关 键 词： | SystemC pn序列 m序列 SoC |
A Pseudo Random Sequence Generator Design Based on the SystemC |
| |
| Pei Pei,Lu Lidan.A Pseudo Random Sequence Generator Design Based on the SystemC[J].Ship Electronic Engineering,2010,30(2):138-140. |
| |
| Authors: | Pei Pei Lu Lidan |
| |
| Institution: | (No. 722 Research Institute of CSIC, Wuhan 430079) |
| |
| Abstract: | A hardware design which generates pseudo random sequence is proposed based on the SystemC, and simulated with Agility Compiler. The simulated result illustrates that this design is very efficient and flexible. |
| |
| Keywords: | SystemC SoC |
| 本文献已被 维普 万方数据 等数据库收录！ |
