| DYNAMIC LABELING BASED FPGA DELAY OPTIMIZATION ALGORITHM |
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| 作者姓名： | 吕宗伟 林争辉 张镭 |
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| 作者单位： | VLSI Research Inst.，Shanghai Jiaotong Univ.，Shanghai，200030，China |
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| 摘 要： | IntroductionIn recentyears,many FPGA technology map-ping algorithms for performance optimization havebeen presented1～ 3 ] .Among them,DAG- MAP is arepresentative algorithm3 ] .This algorithm is pro-grammed into a package and it mainly consists ofthree parts:1 preprocessing procedures transforman arbitrary Boolean network into a two- inputnet-work;2 the DAG- MAP algorithm maps the two-input network into a K- LUT FPGA network withminimum delay;3 postprocessing procedures per-form ar…
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DYNAMIC LABELING BASED FPGA DELAY OPTIMIZATION ALGORITHM |
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| L Zong-wei,LIN Zheng-hui,ZHANG Lei.DYNAMIC LABELING BASED FPGA DELAY OPTIMIZATION ALGORITHM[J].Journal of Shanghai Jiaotong university,2001,6(2). |
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| Authors: | L Zong-wei LIN Zheng-hui ZHANG Lei |
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| Abstract: | DAG-MAP is an FPGA technology mapping algorithm for delay optimization and the labeling phase is the algorithm's kernel. This paper studied the labeling phase and presented an improved labeling method. It is shown through the experimental results on MCNC benchmarks that the improved method is more effective than the original method while the computation time is almost the same. |
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| Keywords: | logic synthesis FPGA technology mapping VLSI electronic design automation |
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