| 基于FPGA的应答器上传链路FSK数字信号解调 |
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| 引用本文： | 田海燕.基于FPGA的应答器上传链路FSK数字信号解调[J].铁路通信信号工程技术,2010,7(3):21-23. |
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| 作者姓名： | 田海燕 |
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| 作者单位： | 沈阳铁路信号工厂,沈阳,110025 |
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| 摘 要： | 主要针对欧标应答器上传链路的FSK信号,提出了使用FPGA芯片,采用VHDL语言,来实现对FSK信号解调的具体方案。
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| 关 键 词： | 应答器 频移键控 数字解调 FPGA |
Analysis of FSK Digital Signal Demodulation Based on FPGA Balise Up-link |
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| Tian Haiyan.Analysis of FSK Digital Signal Demodulation Based on FPGA Balise Up-link[J].Railway Signalling & Communication Engineering,2010,7(3):21-23. |
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| Authors: | Tian Haiyan |
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| Institution: | Tian Haiyan |
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| Abstract: | The article mainly aims at the FSK signal of the European balise up-link, proposes to use the FPGA chip, so that to realize the concrete plan for the FSK signal demodulation with the VHDL language. |
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| Keywords: | FPGA |
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