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Anextremumcontrolsystembasedoncommonhuntingmethods[1 ] cannotworkwellforindustrialprocesses:becauseofthesysteminertialandtimedelayinfluences,thesystemwillbecomeoscillat ing ,workinwrongstepsorwillbehuntingforalongtimefortheworking process.Thepreviousmethod[2 ] canonlyapplytothesystemthathasafastdynamicprocessoritsdynamicresponsecanbeignored .Thispaper proposedadynamichuntingmethod differencepre estimationandcomparisonmethod .Thismethodcanbeusedinsecond orderorhighordersystemswithlargetimecons… 相似文献
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Inindustrialprocessesself searchingoptimumcontrolsystemshavebeenwidelyused ,becausetheydonotneedamathematicalmodel,whichhaveblockdiagram (seeFig .1) .Theprincipleistomakethecontrolsystemreachitsoptimumoperatingstatebycontinuousmeasuringandcontrolling.Thenec essaryconditionisthattheplantsmusthaveanex tremumcharacteristic[1 ] .Thekeyofself searchingoptimumcontrolishowtofindthesystemextremum pointautomati cally .Therearemainlytwokindsofself searchingmethods,whicharethecontinuoussearchingandthest… 相似文献
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刘文江 《济南交通高等专科学校学报》2001,9(2):20-22
介绍了16位单片机INTEL80C196KC与CAN(Control Area Networks)控制器SJA1000的硬件接口及用于远距离串行通信的软件设计。 相似文献
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针对塑焊机温度控制,提出了一种基于遗传算法寻优的PID控制方法。该控制器以系统误差控制输出上升时间和超调量构成的函数为性能指标,利用遗传算法全局搜索能力获取一组最优的PID参数KP,Ti,Td,并且能根据实时获取的误差在线调整参数。应用结果表明,该温度控制器具有良好的动静态特性和鲁棒性。 相似文献
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Block-matching and 3D-filtering(BM3D) is a state of the art denoising algorithm for image/video,which takes full advantages of the spatial correlation and the temporal correlation of the video. The algorithm performance comes at the price of more similar blocks finding and filtering which bring high computation and memory access. Area, memory bandwidth and computation are the major bottlenecks to design a feasible architecture because of large frame size and search range. In this paper, we introduce a novel structure to increase data reuse rate and reduce the internal static-random-access-memory(SRAM) memory. Our target is to design a phase alternating line(PAL) or real-time processing chip of BM3 D. We propose an application specific integrated circuit(ASIC) architecture of BM3 D for a 720 × 576 BT656 PAL format. The feature of the chip is with 100 MHz system frequency and a 166-MHz 32-bit double data rate(DDR). When noise is σ = 25, we successfully realize real-time denoising and achieve about 10 d B peak signal to noise ratio(PSNR) advance just by one iteration of the BM3 D algorithm. 相似文献