| 基于多核技术的数字图像处理阵列电路 |
| |
| 引用本文： | 骆丽,李瑞菁,沈宏.基于多核技术的数字图像处理阵列电路[J].北方交通大学学报,2013(5):157-161. |
| |
| 作者姓名： | 骆丽 李瑞菁 沈宏 |
| |
| 作者单位： | 北京交通大学电子信息工程学院,北京100044 |
| |
| 基金项目： | 国家自然科学基金资助项目（NFSC60976024） |
| |
| 摘 要： | 基于多核技术和指令集控制方式,设计了一种用于数字图像处理的阵列电路,折中了全硬件处理与单核处理中存在的复杂度与速度之间的矛盾.Modelsim仿真结果表明,所提出的处理阵列电路能正确实现基本的图像并行处理功能,具有一定实际应用价值.
|
| 关 键 词： | 数字图像处理 多核 并行处理 处理阵列 VerilogHDL 指令集 |
Digital image processing array circuit based on multi-core technology |
| |
| LUO Li,LI Ruijing,SHEN Hong.Digital image processing array circuit based on multi-core technology[J].Journal of Northern Jiaotong University,2013(5):157-161. |
| |
| Authors: | LUO Li LI Ruijing SHEN Hong |
| |
| Institution: | (School of Electronics and Information Engineering, Beijing Jiaotong University, Beijing 100044,China) |
| |
| Abstract: | A processing array circuit for digital image processing, which is based on multi-core technolo- gy and the control method of instruction set, has been proposed. It compromises the contradiction be- tween complexity and speed in full hardware processing and single-core processing. The simulation re- suits of Modelsim software show that the processing array circuit proposed by this paper implements the right basic function of digital image parallel processing, which has a certain value of practical application. |
| |
| Keywords: | digital image processing multi-core parallel processing processing array VerilogHDL instruction set |
| 本文献已被 维普 等数据库收录！ |
