| 核心路由路百兆线路接口板的设计 |
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| 引用本文： | 高乡月.核心路由路百兆线路接口板的设计[J].铁道工程学报,2003(3):105-108. |
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| 作者姓名： | 高乡月 |
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| 作者单位： | 中国计算机软件与技术服务总公司,北京,100081 |
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| 摘 要： | 本文提出了一种新型的百兆以太网线路接口板。该接口板用于大型高速网络设备——核心路由器。通过设计新型的内部交换报文结构 ,用可编程逻辑硬件实现和相应的组件 ,该接口板可以满足核心路由器对百兆以太网口全双工、高速、工作稳定的要求 ,经测试丢包率很低 ,有很高的应用价值。
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| 关 键 词： | 核心路由器 现场可编程门阵列 |
| 文章编号： | 1006-2106(2003)03-0105-04 |
| 修稿时间： | 2003年5月5日 |
THE DESIGN AND IMPLEMENTATION OF 100 M ETHERNET LINE BOARD IN CORE ROUTER |
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| GAO Xiang-yue,Beijing University of Posts and Telecommunications.THE DESIGN AND IMPLEMENTATION OF 100 M ETHERNET LINE BOARD IN CORE ROUTER[J].Journal of Railway Engineering Society,2003(3):105-108. |
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| Authors: | GAO Xiang-yue Beijing University of Posts and Telecommunications |
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| Institution: | GAO Xiang-yue Beijing University of Posts and Telecommunications |
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| Abstract: | In this paper,a new type of 100 M Ethernet Line Board is presented.It is used for large,high-speed netword device-Core Router.By using new internal switch packet architecture and implementing with FPGA,we can satisfy the need of full duplex,high speed and stabilization for the Core Router.In general test,the lost packet ration of this line board is very low.So it will be used in the network products. |
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| Keywords: | Core Router Field Programmable Gate Array |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
