| 基于CPLD的脉冲宽度测量装置的设计 |
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| 引用本文： | 赵亚范,刘佳琪,王坤.基于CPLD的脉冲宽度测量装置的设计[J].舰船电子工程,2012,32(11):111-113. |
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| 作者姓名： | 赵亚范 刘佳琪 王坤 |
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| 作者单位： | 1. 海军航空工程学院基础实验部,烟台,264001
2. 海军航空工程学院基础部,烟台,264001 |
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| 摘 要： | 基于CPLD的脉冲宽度测量装置是由CPLD、脉冲信号处理、按键输入、液晶显示组成。其中CPLD实现数据及逻辑信号的处理、计时、控制信号的输出，液晶显示部分实现脉冲宽度测量值的显示以及间隔时间的显示。设计的装置硬件电路简单，实用性好。
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| 关 键 词： | CPLD 脉冲宽度测量 间隔时间 QuartusII Verilog HDL |
Design of Pulse Width Measurement Device Based on CPLD |
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| ZHAO Yafan,LIU Jiaqi,WANG Kun.Design of Pulse Width Measurement Device Based on CPLD[J].Ship Electronic Engineering,2012,32(11):111-113. |
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| Authors: | ZHAO Yafan LIU Jiaqi WANG Kun |
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| Institution: | 1.Department of Basic Experiment,Naval Aeronautical and Astronautical University,Yantai 264001) 2.Department of Basic,Naval Aeronautical and Astronautical University,Yantai 264001) |
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| Abstract: | The pulse width measurement device based on CPLD technologies consists of CPLD, pulse signal processing, key input and liquid crystal display. CPLD realizes the process of data signal,logic signal, the timing and the output of control signal, liquid crystal display realizes display the measurement of the pulse width value and interval value. The design electric circuit of installment hardware is simple, the usability is good. |
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| Keywords: | CPLD pulse width measurement interval QuartusII Verilog HDL |
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